{"id":783,"date":"2018-11-05T10:26:27","date_gmt":"2018-11-05T10:26:27","guid":{"rendered":"https:\/\/aiubicrest.com\/?page_id=783"},"modified":"2018-12-28T19:31:33","modified_gmt":"2018-12-28T19:31:33","slug":"workshop-on-worldwide-opportunity-in-vlsi-from-campus-to-industry","status":"publish","type":"page","link":"https:\/\/aiubicrest.com\/index.php\/workshop-on-worldwide-opportunity-in-vlsi-from-campus-to-industry\/","title":{"rendered":"Workshop on Worldwide Opportunity in VLSI: From Campus to Industry"},"content":{"rendered":"<p style=\"text-align: center;\"><em><strong>Workshop on Worldwide Opportunity in VLSI: From Campus to Industry<\/strong><\/em><\/p>\n<p style=\"text-align: center;\"><em><strong>Organized by: Experts of Ulkasemi Pvt. Ltd.<\/strong><\/em><\/p>\n<hr \/>\n<p style=\"text-align: center;\"><a href=\"https:\/\/goo.gl\/Gv44Kg\"><span style=\"color: #ff0000;\"><strong>Registration going on!<\/strong><\/span><\/a><\/p>\n<p style=\"text-align: center;\"><span style=\"color: #ff0000;\"><strong>Due to unavoidable circumstances, the deadline for paying for the workshop has been extended till 2<sup>nd<\/sup>\u00a0January 2019.<\/strong><\/span><\/p>\n<hr \/>\n<p><strong><span style=\"text-decoration: underline;\">About Ulkasemi<\/span> <\/strong><\/p>\n<p style=\"text-align: justify;\">Founded in 2007, Ulkasemi, an advanced semiconductor design and IP\/Licensing company that offers customers flexible product development solutions from standard ASIC design to complete turnkey and derivative design. Company headquarters are located in Silicon Valley, California and Dhaka, Bangladesh. Our flexible model allows us to take projects as turnkey or on consulting basis. Ulkasemi assists its clients in developing their next generation flagship product lines e.g., mobile devices, complex routers\/switches, consumer products, storage devices, microprocessors, graphics processors etc. at the cutting edge technologies that are key and rare in the industry. Today, Ulkasemi is Bangladesh\u2019s Number 1 Semiconductor Design Service Company. After almost 12 years of offering professional Semiconductor Design and Front-End Verification Services, Ulkasemi has over 100 employees distributed around the globe and is aggressively growing.<\/p>\n<p><span style=\"text-decoration: underline;\"><strong>Workshop Objective<\/strong><\/span><\/p>\n<p style=\"text-align: justify;\">Our sessions are devised in a way where the individual participant will be exposed to different steps in the complex yet fascinating design processes involved in the realization of a VLSI project from end-to-end.\u00a0 We want our audience to experience the contours of VLSI design in an era of accelerated innovation and constrained resources.<\/p>\n<p style=\"text-align: justify;\">We want the participants to explore the indentations and in particular, with the massive opportunities which are arising out of the advancements in the field of VLSI, get familiar with the peripherals. We design systems and architectures and our focus at the workshop is thematically designed around four design parameters:<\/p>\n<ol>\n<li>Digital Front-End Verification<\/li>\n<li>Circuit Design<\/li>\n<li>Layout<\/li>\n<li>Place and Route<\/li>\n<\/ol>\n<p style=\"text-align: justify;\">Once completed, the individual participant will feel more confident about both the market opportunities and his\/her capabilities for taking part in this grand adventure.<\/p>\n<p><span style=\"text-decoration: underline;\"><strong>Workshop Outline<\/strong><\/span><\/p>\n<p><strong><em>Session 1: Introduction to Digital Front-End Verification Flow<\/em><\/strong><\/p>\n<p>Presenter: <strong><em>Farshad<\/em>,<\/strong> Member of Technical Staff (MTS)<\/p>\n<p style=\"text-align: justify;\">Digital Front-End Verification checks the functional equivalency of the RTL code with the design specification and also checks for the functional correctness of RTL.The Front-End verification also ensures that all the functional features are tested and all parts of the RTL code is reached by the verification path by using a metric known as functional coverage and code coverage respectively.<\/p>\n<p>&nbsp;<\/p>\n<p><strong><em>Session 2: Introduction to Place and Route (PnR)<\/em><\/strong><\/p>\n<p><strong>\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 <\/strong>Presenter: <strong><em>Shafaitul Islam Surush<\/em><\/strong>, Senior Engineer<\/p>\n<p style=\"text-align: justify;\">Physical design process is often referred as PnR (Place and Route) \/ APR (Automatic Place &amp; Route). The design-cycle of VLSI-chips consists of different consecutive steps from high-level synthesis (functional design) to production. The physical design is the process of transforming a circuit description into the physical layout. Main steps in physical design are placement of all logical cells, clock tree synthesis &amp; routing. During this process of physical design timing, power, design &amp; technology constraints have to be met. Furthermore, design is often optimized w.r.t area, power and performance.<\/p>\n<p><strong><em>\u00a0<\/em><\/strong><\/p>\n<p><strong><em>Session 3: Introduction to Circuit Design &amp; Simulation<\/em><\/strong><\/p>\n<p><strong>\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 <\/strong>Presenter: <em>S M Mojahidul Ahsan, <\/em>Engineer.<\/p>\n<p style=\"text-align: justify;\">The purpose of circuit design is to develop a circuit representation based on active and passive elements from design specifications. The transfer functions are converted into a circuit representation by taking into consideration the speed and power requirements of the original design. Circuit Simulation is used to verify the correctness and timing of each design component. Deep understanding of design hierarchy and circuit debugging ability are also crucial skills for a circuit designer.<\/p>\n<p>&nbsp;<\/p>\n<p><strong><em>Session 4: Custom IC Mask Design<\/em><\/strong><\/p>\n<p><strong>\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 <\/strong>Presenter: <em>Wasif Absar, <\/em>Assistant Engr.<\/p>\n<p style=\"text-align: justify;\">Integrated circuit layout also known as IC layout design is the representation of an integrated circuit in terms of planar geometric shapes which correspond to the patterns of metal, oxide, or semiconductor layers that make up the components of the integrated circuit.<\/p>\n<p><span style=\"text-decoration: underline;\"><strong>Outcome of the Workshop<\/strong><\/span><\/p>\n<ul>\n<li>The participants will get the knowledge of different steps of Custom IC Design<\/li>\n<li>A workshop completion certificate will be provided to attending participants<\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p><span style=\"text-decoration: underline;\"><strong>No. of Participants<\/strong><\/span><\/p>\n<ul>\n<li>The total number of participants is limited to 60<\/li>\n<\/ul>\n<p><span style=\"text-decoration: underline;\"><strong>Last Date of Registration<\/strong><\/span><\/p>\n<ul>\n<li><del>20 December, 2018<\/del><span style=\"color: #ff0000; font-size: 16px;\"><strong> 2 January, 2019 (Final Extension)<\/strong><\/span><\/li>\n<\/ul>\n<p><span style=\"text-decoration: underline;\"><strong>Participants to which seminar is addressed<\/strong><\/span><\/p>\n<ul>\n<li>3<sup>rd<\/sup> and 4<sup>th<\/sup> year EEE Engineering Students<\/li>\n<li>Faculty members of EEE Engineering Department of Universities<\/li>\n<\/ul>\n<p><span style=\"text-decoration: underline;\"><strong>Workshop Date, Time, Venue<\/strong><\/span><\/p>\n<ul>\n<li>Date: 10 January, 2019 (Thursday)<\/li>\n<li>Time: 8:30 am \u2013 5:30 pm<\/li>\n<li>Venue: It will be held in the premises of AIUB campus at Kuratoli Road, Kuril, Bangladesh,<\/li>\n<\/ul>\n<p>Additional information on AIUB campus is available at the website www.aiub.edu<\/p>\n<p><strong><u>Registration Fee<\/u><\/strong><\/p>\n<table width=\"623\">\n<tbody>\n<tr>\n<td width=\"216\">Local participants<\/td>\n<td width=\"407\">BDT 1000<\/td>\n<\/tr>\n<tr>\n<td width=\"216\">Foreign participants<\/td>\n<td width=\"407\">US$ 50<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>*** Registration fee includes kit, handouts, lunch and refreshments.<\/p>\n<p><strong><u>Registration Procedure<\/u><\/strong><\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"alignnone wp-image-922 aligncenter\" src=\"http:\/\/aiubicrest.com\/wp-content\/uploads\/2018\/11\/W1-300x174.jpg\" alt=\"\" width=\"421\" height=\"244\" srcset=\"https:\/\/aiubicrest.com\/wp-content\/uploads\/2018\/11\/W1-300x174.jpg 300w, https:\/\/aiubicrest.com\/wp-content\/uploads\/2018\/11\/W1.jpg 521w\" sizes=\"auto, (max-width: 421px) 100vw, 421px\" \/><\/p>\n<p style=\"text-align: center;\"><strong><span style=\"color: #ff0000;\">For Registration<\/span>, please <a href=\"https:\/\/goo.gl\/Gv44Kg\">click here<\/a><\/strong><\/p>\n<p style=\"text-align: center;\"><strong><span style=\"color: #339966;\">To download Flyer<\/span>, please <a href=\"http:\/\/aiubicrest.com\/wp-content\/uploads\/2018\/12\/ICREST_W1_V2.jpg\">click here<\/a><\/strong><\/p>\n<p><span style=\"text-decoration: underline;\"><strong>Tentative Workshop Schedule<\/strong><\/span><\/p>\n<p><strong>Date\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 : January 10, 2019 (Thursday)<\/strong><br \/>\n<strong>Time \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 : 8:30 am to 5:30 pm <\/strong><br \/>\n<strong>Venue\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0: It will be held in the premises of AIUB campus at Kuratoli Road, Kuril, Dhaka<\/strong><\/p>\n<table style=\"width: 801px;\">\n<tbody>\n<tr>\n<td style=\"width: 98px;\"><strong>8:15 am<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Participants take their seats<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>8:30 am<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Welcome Message by Prof. Dr. ABM Siddique Hossain, Dean, Faculty of Engineering<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>8:45 am<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Session 1: Introduction to Digital Front-End Verification Flow by Farshad, Member of Technical Staff (MTS)<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>10:15 am<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Snacks and Tea Break<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>10:30 am<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Session 2: Introduction to Place and Route (PnR) by Shafaitul Islam Surush, Senior Engineer<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>12:00 pm<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Lunch and prayer Break<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>1:00 pm<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Session 3: Introduction to Circuit Design &amp; Simulation by S M Mojahidul Ahsan, Engineer.<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>2:30 pm <\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Session 4: Custom IC Mask Design by Wasif Absar, Assistant Engr.<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>5:00 pm<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Certificate Distribution by Professor Dr. ABM Siddique Hossain, Dean, Faculty of Engineering, AIUB<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>5:15 pm<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Vote of thanks by Professor Dr. Md. Abdur Rahman, Assoc. Dean, Faculty of Engineering<\/td>\n<\/tr>\n<tr>\n<td style=\"width: 98px;\"><strong>5:30 pm<\/strong><\/td>\n<td style=\"width: 35px;\"><strong>:<\/strong><\/td>\n<td style=\"width: 664px;\">Closing<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"excerpt":{"rendered":"<p>Workshop on Worldwide Opportunity in VLSI: From Campus to Industry Organized by: Experts of Ulkasemi Pvt. Ltd. Registration going on! Due to unavoidable circumstances, the deadline for paying for the workshop has been extended till 2nd\u00a0January 2019. About Ulkasemi Founded in 2007, Ulkasemi, an advanced semiconductor design and IP\/Licensing company that offers customers flexible product [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-783","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/pages\/783","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/comments?post=783"}],"version-history":[{"count":17,"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/pages\/783\/revisions"}],"predecessor-version":[{"id":1040,"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/pages\/783\/revisions\/1040"}],"wp:attachment":[{"href":"https:\/\/aiubicrest.com\/index.php\/wp-json\/wp\/v2\/media?parent=783"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}